MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 117

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MC68HC908JG16FA

Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
8.8 SIM Registers
8.8.1 SIM Break Status Register (SBSR)
MC68HC908JG16
MOTOROLA
Rev. 1.0
Note 1. Writing a logic 0 clears SBSW.
Address:
The SIM has three memory mapped registers.
The SIM break status register contains a flag to indicate that a break
caused an exit from stop or wait mode.
SBSW — SIM Break Stop/Wait
Reset:
Read:
Write:
This status bit is useful in applications requiring a return to wait or stop
mode after exiting from a break interrupt. Clear SBSW by writing a
logic 0 to it. Reset clears SBSW.
SBSW can be read within the break state SWI routine. The user can
modify the return address on the stack by subtracting one from it.
The following code is an example of this. Writing 0 to the SBSW bit
clears it.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break interrupt
SIM break status register (SBSR)
SIM reset status register (SRSR)
SIM break flag control register (SBFCR)
$FE00
Bit 7
R
Figure 8-20. SIM Break Status Register (SBSR)
System Integration Module (SIM)
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R
6
R
5
R
R
4
= Reserved
R
3
System Integration Module (SIM)
R
2
SBSW
Note 1
1
0
Technical Data
SIM Registers
Bit 0
R
117

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