MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 115

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

8.7.2 Stop Mode
MC68HC908JG16
MOTOROLA
NOTE:
—
Rev. 1.0
In stop mode, the SIM counter is reset and the system clocks are
disabled. An interrupt request from a module can cause an exit from stop
mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the oscillator signals (OSCOUT and OSCDCLK) in
stop mode, stopping the CPU and peripherals. Stop recovery time is
selectable using the SSREC bit in the configuration register (CONFIG).
If SSREC is set, stop recovery is reduced from the normal delay of 4096
OSCDCLK cycles down to 2048. This is ideal for applications using
canned oscillators that do not require long startup times from stop mode.
External crystal applications should use the full stop recovery time by
clearing the SSREC bit.
OSCDCLK
Freescale Semiconductor, Inc.
IAB
IDB
EXITSTOPWAIT
NOTE: EXITSTOPWAIT = RST pin or CPU interrupt or break interrupt
For More Information On This Product,
RST
IAB
IDB
Figure 8-16. Wait Recovery from Interrupt or Break
$A6
System Integration Module (SIM)
$A6
Figure 8-17. Wait Recovery from Internal Reset
Go to: www.freescale.com
$6E0B
$A6
$6E0B
$A6
$A6
$A6
$6E0C
CYCLES
$01
32
$00FF
$0B
CYCLES
32
$00FE
System Integration Module (SIM)
$6E
$00FD
RST VCT H RST VCT L
Low-Power Modes
$00FC
Technical Data
115