MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 261
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
(324 pages)
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14.4 Port B
14.4.1 Port B Data Register
14.4.2 Data Direction Register B
MC68HC908JG16
MOTOROLA
—
Rev. 1.0
Address:
Address:
Port B is an 1-bit general-purpose bidirectional I/O port with software
configurable pullup.
The port B data register contains the data latch for PTB0.
PTB0 — PTB0 Data Bit
Data direction register B determines whether PTB0 is an input or an
output. Writing a logic 1 to DDRB0 bit enables the output buffer for the
PTB0 pin; a logic 0 disables the output buffer.
Reset:
Reset:
Read:
Read:
Write:
Write:
This read/write bit is software programmable. Data direction of PTB0
pin is under control of the DDRB0 bit in the data direction register B.
Reset has no effect on port B data.
The port B pullup control bit, PBP, in the port option control register
(POCR) enables the pullup on PTB0 pin if configured as an input.
(See
Freescale Semiconductor, Inc.
For More Information On This Product,
$0001
14.8 Port
$0005
Bit 7
Bit 7
0
0
0
Figure 14-6. Data Direction Register B (DDRB)
Go to: www.freescale.com
Figure 14-5. Port B Data Register (PTB)
Input/Output (I/O) Ports
6
0
6
0
0
Options.)
5
0
5
0
0
Unaffected by reset
4
0
4
0
0
3
0
3
0
0
2
0
2
0
0
Input/Output (I/O) Ports
1
0
1
0
0
Technical Data
DDRB0
PTB0
Bit 0
Bit 0
Port B
0
261
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