MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 118
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
(324 pages)
- Current page: 118 of 324
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System Integration Module (SIM)
8.8.2 SIM Reset Status Register (SRSR)
Technical Data
118
;
;
;
;
This code works if the H register has been pushed onto the stack in the break
service routine software. This code should be executed at the end of the break
service routine software.
HIBYTE
LOBYTE
DOLO
RETURN
EQU
EQU
If not SBSW, do RTI
BRCLR
TST
BNE
DEC
DEC
PULH
RTI
5
6
SBSW,SBSR, RETURN
LOBYTE,SP
DOLO
HIBYTE,SP
LOBYTE,SP
Address:
This register contains seven flags that show the source of the last reset.
All flag bits are cleared automatically following a read of the register. The
register is initialized on power-up as shown with the POR bit set and all
other bits cleared. However, during a POR or any other internal reset,
the RST pin is pulled low. After the pin is released, it will be sampled 32
OSCDCLK cycles later. If the pin is not above a V
PIN bit in the SRSR may be set in addition to whatever other bits are set.
POR — Power-On Reset Bit
Read:
Write:
POR:
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Last reset caused by POR circuit
0 = Read of SRSR
$FE01
POR
Bit 7
1
Figure 8-21. SIM Reset Status Register (SRSR)
System Integration Module (SIM)
Go to: www.freescale.com
= Unimplemented
PIN
6
0
;
;
;If RETURNLO is not zero,
;then just decrement low byte.
;Else deal with high byte, too.
;Point to WAIT/STOP opcode.
;Restore H register.
See if wait mode or stop mode was exited by
break.
COP
5
0
ILOP
4
0
ILAD
3
0
MC68HC908JG16
IH
USB
2
0
at that time, then the
LVI
1
0
MOTOROLA
—
Rev. 1.0
Bit 0
0
0
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