MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 102
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
(324 pages)
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System Integration Module (SIM)
8.4.2.1 Power-On Reset
Technical Data
102
When power is first applied to the MCU, the power-on reset module
(POR) generates a pulse to indicate that power-on has occurred. The
external reset pin (RST) is held low while the SIM counter counts out
4096 OSCDCLK cycles. Sixty-four OSCDCLK cycles later, the CPU and
memories are released from reset to allow the reset vector sequence to
occur.
At power-on, the following events occur:
OSCDCLK
OSCOUT
PORRST
•
•
•
•
•
•
Freescale Semiconductor, Inc.
OSC1
RST
IAB
For More Information On This Product,
A POR pulse is generated.
The internal reset signal is asserted.
The SIM enables the oscillator to drive OSCDCLK.
Internal clocks to the CPU and modules are held inactive for 4096
OSCDCLK cycles to allow stabilization of the oscillator.
The RST pin is driven low during the oscillator stabilization time.
The POR bit of the SIM reset status register (SRSR) is set and all
other bits in the register are cleared.
System Integration Module (SIM)
Go to: www.freescale.com
CYCLES
4096
Figure 8-7. POR Recovery
CYCLES
32
CYCLES
32
MC68HC908JG16
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MOTOROLA
—
Rev. 1.0
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