MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 78

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MC68HC908JG16FA

Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Central Processor Unit (CPU)
6.4.5 Condition Code Register
Technical Data
78
The 8-bit condition code register contains the interrupt mask and five
flags that indicate the results of the instruction just executed. Bits 6 and
5 are set permanently to logic 1. The following paragraphs describe the
functions of the condition code register.
V — Overflow Flag
H — Half-Carry Flag
Reset:
Read:
Write:
The CPU sets the overflow flag when a two's complement overflow
occurs. The signed branch instructions BGT, BGE, BLE, and BLT use
the overflow flag.
The CPU sets the half-carry flag when a carry occurs between
accumulator bits 3 and 4 during an add-without-carry (ADD) or add-
with-carry (ADC) operation. The half-carry flag is required for binary-
coded decimal (BCD) arithmetic operations. The DAA instruction
uses the states of the H and C flags to determine the appropriate
correction factor.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Overflow
0 = No overflow
1 = Carry between bits 3 and 4
0 = No carry between bits 3 and 4
X = Indeterminate
Bit 7
V
X
Central Processor Unit (CPU)
Figure 6-6. Condition Code Register (CCR)
Go to: www.freescale.com
6
1
1
5
1
1
H
X
4
3
1
I
MC68HC908JG16
N
X
2
1
Z
X
MOTOROLA
Rev. 1.0
Bit 0
C
X

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