MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 149

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

10.9 I/O Signals
10.9.1 TIM Clock Pin (PTE0/TCLK)
10.9.2 TIM Channel I/O Pins (PTE1/T1CH01:PTE2/T2CH01)
MC68HC908JG16
MOTOROLA
—
Rev. 1.0
Port E shares three of its pins with the TIM. PTE0/TCLK is an external
clock input to the TIM prescaler. The two TIM channel I/O pins are
PTE1/T1CH01 and PTE2/T2CH01.
PTE0/TCLK is an external clock input that can be the clock source for
the TIM counter instead of the prescaled internal bus clock. Select the
PTE0/TCLK input by writing logic 1s to the three prescaler select bits,
PS[2:0]. (See
TCLK pulse width, TCLK
The maximum TCLK frequency is:
PTE0/TCLK is available as a general-purpose I/O pin when not used as
the TIM clock input. When the PTE0/TCLK pin is the TIM clock input, it
is an input regardless of the state of the DDRE0 bit in data direction
register E.
Each TIM I/O pin is programmable independently as an input capture pin
or an output compare pin, or configured as buffered output compare or
buffered PWM pins.
Freescale Semiconductor, Inc.
For More Information On This Product,
Timer Interface Module (TIM)
Go to: www.freescale.com
10.10.1 TIM Status and Control
LMIN
------------------------------------ -
bus frequency
bus frequency
or TCLK
1
HMIN
+
, is:
2
t
SU
Register.) The minimum
Timer Interface Module (TIM)
Technical Data
I/O Signals
149