MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 81

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

6.6.2 Stop Mode
6.7 CPU During Break Interrupts
6.8 Instruction Set Summary
6.9 Opcode Map
MC68HC908JG16
MOTOROLA
—
Rev. 1.0
The STOP instruction:
After exiting stop mode, the CPU clock begins running after the oscillator
stabilization delay.
If the break module is enabled, a break interrupt causes the CPU to
execute the software interrupt instruction (SWI) at the completion of the
current CPU instruction. (See
program counter vectors to $FFFC–$FFFD ($FEFC–$FEFD in monitor
mode).
A return-from-interrupt instruction (RTI) in the break routine ends the
break interrupt and returns the MCU to normal operation if the break
interrupt has been deasserted.
Table 6-1
The opcode map is provided in
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
Clears the interrupt mask (I bit) in the condition code register,
enabling external interrupts. After exit from stop mode by external
interrupt, the I bit remains clear. After exit by reset, the I bit is set.
Disables the CPU clock.
provides a summary of the M68HC08 instruction set.
Central Processor Unit (CPU)
Go to: www.freescale.com
Section 19. Break Module
Table
6-2.
Central Processor Unit (CPU)
CPU During Break Interrupts
(BRK).) The
Technical Data
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