MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 295

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

17.5 COP Control Register
17.6 Interrupts
17.7 Monitor Mode
17.8 Low-Power Modes
MC68HC908JG16
MOTOROLA
—
Rev. 1.0
Address:
The COP control register is located at address $FFFF and overlaps the
reset vector. Writing any value to $FFFF clears the COP counter and
starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
The COP does not generate CPU interrupt requests.
When monitor mode is entered with V
disabled as long as V
monitor mode is entered by having blank reset vectors and not having
V
occurs.
The WAIT and STOP instructions put the MCU in low power-
consumption standby modes.
Reset:
Read:
Write:
TST
Freescale Semiconductor, Inc.
For More Information On This Product,
on the IRQ pin, the COP is automatically disabled until a POR
$FFFF
Computer Operating Properly (COP)
Bit 7
Figure 17-3. COP Control Register (COPCTL)
Go to: www.freescale.com
6
TST
remains on the IRQ pin or the RST pin. When
5
Clears COP counter (any value)
Low byte of reset vector
Unaffected by reset
4
TST
Computer Operating Properly (COP)
on the IRQ pin, the COP is
3
2
COP Control Register
1
Technical Data
Bit 0
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