MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 251
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
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13.8 I/O Registers
13.8.1 ADC Status and Control Register
MC68HC908JG16
MOTOROLA
—
Rev. 1.0
Address:
Three I/O registers control and monitor ADC operation:
Function of the ADC status and control register is described here.
COCO — Conversions Complete Bit
AIEN — ADC Interrupt Enable Bit
Reset:
Read:
Write:
•
•
•
When the AIEN bit is a logic 0, the COCO is a read-only bit which is
set each time a conversion is completed. This bit is cleared whenever
the ADC status and control register is written, or whenever the ADC
data register is read. Reset clears this bit.
If the AIEN bit is a logic 1, the COCO becomes a read/write bit, which
should be cleared to logic 0 for CPU to service the ADC interrupt
request. Reset clears this bit.
When this bit is set, an interrupt is generated at the end of an ADC
conversion. The interrupt signal is cleared when the data register is
read or the status and control register is written. Reset clears the
AIEN bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 13-3. ADC Status and Control Register (ADSCR)
1 = conversion completed (AIEN = 0)
0 = conversion not completed (AIEN = 0)
1 = ADC interrupt enabled
0 = ADC interrupt disabled
ADC status and control register (ADSCR)
ADC data register (ADR)
ADC input clock register (ADICLK)
COCO
$0061
Bit 7
Analog-to-Digital Converter (ADC)
0
Go to: www.freescale.com
= Unimplemented
AIEN
6
0
ADCO
5
0
ADCH4
4
1
ADCH3
3
1
Analog-to-Digital Converter (ADC)
ADCH2
2
1
ADCH1
1
1
Technical Data
I/O Registers
ADCH0
Bit 0
1
251
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