MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 299

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

18.4.2 Low V
18.5 LVI Control and Configuration
MC68HC908JG16
MOTOROLA
NOTE:
REG
—
Rev. 1.0
Detector
* LVIDR, LVI5OR3, URSTD, and LVID bits are reset by POR (power-on reset) or LVI reset only.
Address:
Reset:
The low V
LVI reset when the V
LVI circuit can be disabled by the setting the LVIDR bit in CONFIG.
There is no LVI circuit for V
Three bits in the configuration register (CONFIG) control the operation
of the LVI module.
LVIDR — LVI Disable Bit for V
LVI5OR3 — LVI Trip Point Voltage Select Bit for V
LVID — LVI Disable Bit for V
Read:
Write:
LVIDR disables the LVI circuit for V
LVI5OR3 selects the trip point voltage of the LVI circuit for V
Section 20. Electrical Specifications
LVID disables the LVI circuit for V
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = LVI circuit for V
0 = LVI circuit for V
1 = LVI trips at 3.3V
0 = LVI trips at 2.4V
1 = LVI circuit for V
0 = LVI circuit for V
$001F
LVIDR
Bit 7
0*
Figure 18-2. Configuration Register (CONFIG)
REG
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Low-Voltage Inhibit (LVI)
LVI5OR3
= Unimplemented
detector circuit monitors the V
0*
6
REG
URSTD
REG
REG
DD
DD
0*
5
voltage falls below the trip voltage. The V
REGA
disabled
enabled
DD
disabled
enabled
REG
LVID
.
0*
4
DD
REG
.
SSREC
for the trip voltage tolerances.
3
0
.
REG
LVI Control and Configuration
COPRS
voltage and forces a
2
0
DD
Low-Voltage Inhibit (LVI)
STOP
1
0
Technical Data
DD
COPD
. See
Bit 0
REG
0
299