MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 294
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
(324 pages)
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Computer Operating Properly (COP)
17.4.5 Internal Reset
17.4.6 Reset Vector Fetch
17.4.7 COPD (COP Disable)
17.4.8 COPRS (COP Rate Select)
Technical Data
294
* LVIDR, LVI5OR3, URSTD, and LVID, are reset by POR or LVI reset only.
Address:
An internal reset clears the COP prescaler and the COP counter.
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
The COPD signal reflects the state of the COP disable bit (COPD) in the
CONFIG register. (See
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the CONFIG register. (See
COPRS — COP Rate Select Bit
COPD — COP Disable Bit
Reset:
Read:
Write:
COPRS selects the COP timeout period. Reset clears COPRS.
COPD disables the COP module.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = COP timeout period is 2
0 = COP timeout period is 2
1 = COP module disabled
0 = COP module enabled
LVIDR
$001F
Computer Operating Properly (COP)
Bit 7
0*
Figure 17-2. Configuration Register (CONFIG)
Go to: www.freescale.com
LVI5OR3
0*
6
Figure
URSTD
0*
5
Figure
17-2.)
LVID
13
18
0*
4
– 2
– 2
17-2.)
4
4
SSREC
OSCDCLK cycles
OSCDCLK cycles
3
0
MC68HC908JG16
COPRS
2
0
STOP
1
0
MOTOROLA
—
Rev. 1.0
COPD
Bit 0
0
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