MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 126

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Monitor ROM (MON)
Technical Data
126
Figure
the reset vector is blank and IRQ = V
required for a baud rate of 19200.
Enter monitor mode with the pin configuration shown in
pulling RST low and then high. The rising edge of RST latches monitor
mode. Once monitor mode is latched, the values on the specified pins
can change.
Once out of reset, the MCU waits for the host to send eight security
bytes. (See
break signal (10 consecutive logic zeros) to the host, indicating that it is
ready to receive a command. The break signal also provides a timing
reference to allow the host to determine the necessary baud rate.
In monitor mode, the MCU uses different vectors for reset, SWI
(software interrupt), and break interrupt than those for user mode. The
alternate vectors are in the $FE page instead of the $FF page and allow
code execution from the internal monitor firmware instead of user code.
Table 9-2
and monitor mode.
Notes:
Monitor
1. If the high voltage (V
Modes
User
Freescale Semiconductor, Inc.
COP enable output. The COP is a mask option enabled or disabled by the COPD bit in the
configuration register.
For More Information On This Product,
9-2. shows a simplified diagram of the monitor mode entry when
Disabled
is a summary of the vector differences between user mode
Enabled
9.5
Go to: www.freescale.com
Table 9-2. Monitor Mode Vector Differences
COP
Monitor ROM (MON)
Security.) After the security bytes, the MCU sends a
(1)
TST
) is removed from the IRQ pin or the RST pin, the SIM asserts its
Vector
$FFFE
$FEFE
Reset
High
Vector
$FFFF
$FEFF
Reset
Low
Functions
DD
Vector
$FFFC
$FEFC
Break
. An external clock of 12MHz is
High
MC68HC908JG16
Vector
$FEFD
$FFFD
Break
Low
Figure 9-1
Vector
$FFFC
$FEFC
High
SWI
MOTOROLA
—
$FEFD
Vector
$FFFD
Rev. 1.0
SWI
Low
by