MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 189
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
(324 pages)
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11.8.7 USB Control Register 2
MC68HC908JG16
MOTOROLA
—
Rev. 1.0
Address:
FRESUM — Force Resume
TP1SIZ3–TP1SIZ0 — Endpoint 1 Transmit Data Packet Size
T2SEQ — Endpoint 2 Transmit Sequence Bit
Reset:
Read:
Write:
If this bit is 0 or the TXD1F is set, the USB will respond with a NAK
handshake to any endpoint 1 directed IN tokens. Reset clears this bit.
This read/write bit forces a resume state (K or non-idle state) onto the
USB data lines to initiate a remote wakeup. Software should control
the timing of the forced resume to be between 10 and 15 ms. Setting
this bit will not cause the RESUMF bit to be set.
These read/write bits store the number of transmit data bytes for the
next IN token request for endpoint 1. These bits are cleared by reset.
This read/write bit determines which type of data packet (DATA0 or
DATA1) will be sent during the next IN transaction directed to
endpoint 2. Toggling of this bit must be controlled by software. Reset
clears this bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Data is ready to be sent
0 = Data is not ready. Respond with NAK
1 = Force data lines to K state
0 = Default
1 = DATA1 token active for next endpoint 2 transmit
0 = DATA0 token active for next endpoint 2 transmit
T2SEQ
$0019
Bit 7
Universal Serial Bus Module (USB)
0
Figure 11-21. USB Control Register 2 (UCR2)
Go to: www.freescale.com
STALL2
6
0
TX2E
5
0
RX2E
4
0
TP2SIZ3
Universal Serial Bus Module (USB)
3
0
TP2SIZ2
2
0
TP2SIZ1
1
0
Technical Data
I/O Registers
TP2SIZ0
Bit 0
0
189
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