MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 108

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MC68HC908JG16FA

Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
System Integration Module (SIM)
Technical Data
108
INTERRUPT
INTERRUPT
MODULE
MODULE
I BIT
I BIT
R/W
R/W
IAB
IDB
IAB
IDB
DUMMY
DUMMY
Interrupts are latched and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt can take precedence, regardless of priority,
until the latched interrupt is serviced or the I bit is cleared.
At the beginning of an interrupt, the CPU saves the CPU register
contents on the stack and sets the interrupt mask (I bit) to prevent
additional interrupts. At the end of an interrupt, the RTI instruction
recovers the CPU register contents from the stack so that normal
processing can resume.
8-10
SP – 4
Freescale Semiconductor, Inc.
SP
PC – 1[7:0] PC – 1[15:8]
For More Information On This Product,
shows interrupt recovery timing.
CCR
Figure 8-10. Interrupt Recovery
SP – 3
SP – 1
Figure 8-9
System Integration Module (SIM)
Go to: www.freescale.com
A
SP – 2
SP – 2
.
Interrupt Entry
X
X
Figure 8-9
SP – 3
SP – 1
PC – 1[15:8] PC – 1 [7:0] OPCODE
A
SP – 4
SP
shows interrupt entry timing.
CCR
VECT H
PC
V DATA H
VECT L
MC68HC908JG16
PC + 1
OPERAND
V DATA L
START ADDR
OPCODE
MOTOROLA
Figure
Rev. 1.0

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