MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 260
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
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Input/Output (I/O) Ports
Technical Data
260
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port A pins.
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
DDRA
Freescale Semiconductor, Inc.
Bit
0
1
For More Information On This Product,
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
Go to: www.freescale.com
PTA Bit
Input/Output (I/O) Ports
X
X
(1)
Table 14-2. Port A Pin Functions
Figure 14-4. Port A I/O Circuit
RESET
I/O Pin Mode
Input, Hi-Z
Output
(2)
DDRAx
PTAx
Read/Write
DDRA[7:0]
DDRA[7:0]
Accesses
to DDRA
Table 14-2
MC68HC908JG16
PTA[7:0]
Read
Accesses to PTA
Pin
summarizes
MOTOROLA
PTA[7:0]
PTA[7:0]
—
Write
Rev. 1.0
PTAx
(3)
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