MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 239

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MC68HC908JG16FA

Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC908JG16
MOTOROLA
BYTE 1
BYTE 1
Rev. 1.0
READ SCDR
READ SCS1
PE — Receiver Parity Error Bit
SCRF = 1
This clearable, read-only bit is set when the SCI detects a parity error
in incoming data. PE generates a PE CPU interrupt request if the
PEIE bit in SCC3 is also set. Clear the PE bit by reading SCS1 with
PE set and then reading the SCDR. Reset clears the PE bit.
Freescale Semiconductor, Inc.
BYTE 1
OR = 0
Figure 12-13. Flag Clearing Sequence
Serial Communications Interface Module (SCI)
For More Information On This Product,
1 = Parity error detected
0 = No parity error detected
READ SCDR
READ SCS1
DELAYED FLAG CLEARING SEQUENCE
NORMAL FLAG CLEARING SEQUENCE
BYTE 2
BYTE 2
SCRF = 1
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BYTE 1
OR = 0
READ SCDR
READ SCS1
SCRF = 1
BYTE 2
OR = 0
BYTE 3
BYTE 3
Serial Communications Interface Module (SCI)
READ SCDR
READ SCDR
READ SCS1
READ SCS1
SCRF = 1
SCRF = 1
BYTE 3
BYTE 3
OR = 1
OR = 0
BYTE 4
BYTE 4
Technical Data
I/O Registers
239

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