MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 96

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MC68HC908JG16FA

Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
System Integration Module (SIM)
8.2 Introduction
Technical Data
96
8.6.4
8.6.5
8.7
8.7.1
8.7.2
8.8
8.8.1
8.8.2
8.8.3
This section describes the system integration module (SIM). Together
with the CPU, the SIM controls all MCU activities. The SIM is a system
state controller that coordinates CPU and exception timing. A block
diagram of the SIM is shown in
the SIM I/O registers. The SIM is responsible for:
Table 8-1
Freescale Semiconductor, Inc.
For More Information On This Product,
Bus clock generation and control for CPU and peripherals
– Stop/wait/reset/break entry and recovery
– Internal clock control
Master reset control, including power-on reset (POR) and COP
timeout
Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .114
SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Break Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113
Status Flag Protection in Break Mode . . . . . . . . . . . . . . . . 113
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
SIM Break Status Register (SBSR) . . . . . . . . . . . . . . . . . . 117
SIM Reset Status Register (SRSR) . . . . . . . . . . . . . . . . . . 118
SIM Break Flag Control Register (SBFCR) . . . . . . . . . . . .119
System Integration Module (SIM)
shows the internal signal names used in this section.
Go to: www.freescale.com
Figure
8-1.
Figure 8-2
MC68HC908JG16
is a summary of
MOTOROLA
Rev. 1.0

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