MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 58
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
(324 pages)
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FLASH Memory
4.3 Functional Description
Technical Data
58
$FE08
$FE09
Addr.
FLASH Control Register
Register Name
FLASH Block Protect
NOTE:
(FLBPR)
Register
(FLCR)
The FLASH memory consists of an array of 16,384 bytes for user
memory plus a block of 48 bytes for user interrupt vectors. An erased bit
reads as logic 1 and a programmed bit reads as a logic 0. The FLASH
memory is block erasable. The minimum erase block size is 512 bytes.
Program and erase operation operations are facilitated through control
bits in FLASH Control Register (FLCR).The address ranges for the
FLASH memory are shown as follows:
Programming tools are available from Motorola. Contact your local
Motorola representative for more information.
A security feature prevents viewing of the FLASH contents.
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 4-1. FLASH I/O Register Summary
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
$BA00–$F9FF (user memory, 16,384 bytes)
$FFD0–$FFFF (user interrupt vectors, 48 bytes)
BPR7
Bit 7
0
0
0
Go to: www.freescale.com
= Unimplemented
BPR6
FLASH Memory
6
0
0
0
BPR5
5
0
0
0
BPR4
4
0
0
0
HVEN
BPR3
3
0
0
MC68HC908JG16
MASS
BPR2
2
0
0
ERASE
BPR1
1
0
0
1
MOTOROLA
—
Rev. 1.0
BPR0
PGM
Bit 0
0
0
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