MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 124

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Monitor ROM (MON)
9.4.1 Entering Monitor Mode
Technical Data
124
Notes:
1. PTA3 = 0: Bypasses the divide-by-two prescaler to SIM when using V
2. See
V
V
TST
TST
V
V
DD
DD
(2)
(2)
Section 20. Electrical Specifications
(contain
BLANK
BLANK
$FF)
NOT
X
X
1
1
1
1
Table 9-1. Mode Entry Requirements and Options
Factory use only
Table 9-1
specified in the table, monitor mode may be entered after a POR and will
allow communication at 19200 baud provided one of the following sets
of conditions is met:
X
X
0
1
1. If IRQ = V
2. If $FFFE & $FFFF is blank (contains $FF):
Freescale Semiconductor, Inc.
X
X
For More Information On This Product,
0
0
– External clock on OSC1 is 12MHz
– PTA3 = high
– PTE3 = high
– External clock on OSC1 is 12MHz
– IRQ = V
– PTE3 = high
1
1
X
X
shows the pin conditions for entering monitor mode. As
for V
Go to: www.freescale.com
X
1
1
1
Monitor ROM (MON)
TST
TST
External Clock,
DD
voltage level requirements.
:
12 MHz
12 MHz
12 MHz
12 MHz
f
XCLK
TST
Frequency,
(f
(f
(f
for monitor mode entry.
12 MHz
XCLK
XCLK
XCLK
(f
6 MHz
6 MHz
6 MHz
f
Bus
XCLK
BUS
÷ 2)
÷ 2)
÷ 2)
)
MC68HC908JG16
High-voltage entry to
monitor mode.
38400 baud communication
on PTA0. COP disabled.
High-voltage entry to
monitor mode.
19200 baud communication
on PTA0. COP disabled.
Low-voltage entry to
monitor mode.
19200 baud communication
on PTA0. COP disabled.
Enters user mode.
If $FFFE and $FFFF is
blank, MCU will encounter
an illegal address reset.
Comments
MOTOROLA
—
Rev. 1.0