MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 70

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Configuration Register (CONFIG)
5.4 Configuration Register
Technical Data
70
NOTE:
* LVIDR, LVI5OR3, URSTD, and LVID bits are reset by POR (power-on reset) or LVI reset only.
Address:
Reset:
LVIDR — LVI Disable Bit for V
There is no LVI circuit for V
LVI5OR3 — LVI Trip Point Voltage Select Bit for V
URSTD — USB Reset Disable Bit
LVID — LVI Disable Bit for V
Read:
Write:
LVIDR disables the LVI circuit for V
Voltage Inhibit
LVI5OR3 selects the trip point voltage of the LVI circuit for V
(See
URSTD disables the USB reset signal generating an internal reset to
the CPU and internal registers. Instead, it will generate an interrupt
request to the CPU. (See
(USB).)
LVID disables the LVI circuit for V
Inhibit
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = LVI circuit for V
0 = LVI circuit for V
1 = LVI trips at 3.3V
0 = LVI trips at 2.4V
1 = USB reset generates a USB interrupt request to CPU
0 = USB reset generates a chip reset
1 = LVI circuit for V
0 = LVI circuit for V
$001F
LVIDR
Bit 7
Section 18. Low-Voltage Inhibit
0*
Configuration Register (CONFIG)
(LVI).)
Figure 5-1. Configuration Register (CONFIG)
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LVI5OR3
0*
6
(LVI).)
URSTD
REG
REG
DD
DD
0*
5
REGA
disabled
enabled
Section 11. Universal Serial Bus Module
DD
disabled
enabled
REG
LVID
.
0*
4
DD
REG
. (See
SSREC
3
0
. (See
(LVI).)
Section 18. Low-Voltage
MC68HC908JG16
COPRS
Section 18. Low-
2
0
DD
STOP
1
0
MOTOROLA
—
DD
Rev. 1.0
COPD
Bit 0
.
0