MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 253

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

13.8.2 ADC Data Register
13.8.3 ADC Input Clock Register
MC68HC908JG16
MOTOROLA
NOTE:
—
Rev. 1.0
Address:
Address:
One 8-bit result register, ADC data register (ADR), is provided. This
register is updated each time an ADC conversion completes.
The ADC input clock register (ADICLK) selects the clock frequency for
the ADC.
ADIV[2:0] — ADC Clock Prescaler Bits
The ADC frequency must be between t
maximum to meet ADC specifications. (See
Characteristics.)
Reset:
Reset:
Read:
Read:
Write:
Write:
ADIV[2:0] form a 3-bit field which selects the divider used by the ADC
to generate the internal ADC clock.
clock configurations. The ADC clock should be set to approximately
1.5MHz.
Freescale Semiconductor, Inc.
For More Information On This Product,
ADIV2
$0062
$0063
Bit 7
AD7
Bit 7
Figure 13-5. ADC Input Clock Register (ADICLK)
Analog-to-Digital Converter (ADC)
0
Go to: www.freescale.com
Figure 13-4. ADC Data Register (ADR)
= Unimplemented
= Unimplemented
ADIV1
AD6
6
6
0
ADIV0
AD5
5
5
0
Indeterminate after reset
AD4
4
4
0
0
Table 13-2
ADIC
AD3
3
3
0
0
Analog-to-Digital Converter (ADC)
minimum and t
20.13 ADC Electrical
AD2
shows the available
2
2
0
0
AD1
1
1
0
0
ADIC
Technical Data
I/O Registers
Bit 0
AD0
Bit 0
0
0
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