MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 152
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
(324 pages)
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Timer Interface Module (TIM)
10.10.2 TIM Counter Registers
Technical Data
152
NOTE:
Address: T1CNTH, $000C and T2CNTH, $0042
PS[2:0] — Prescaler Select Bits
The two read-only TIM counter registers contain the high and low bytes
of the value in the TIM counter. Reading the high byte (TCNTH) latches
the contents of the low byte (TCNTL) into a buffer. Subsequent reads of
TCNTH do not affect the latched TCNTL value until TCNTL is read.
Reset clears the TIM counter registers. Setting the TIM reset bit (TRST)
also clears the TIM counter registers.
If you read TCNTH during a break interrupt, be sure to unlatch TCNTL
by reading TCNTL before exiting the break interrupt. Otherwise, TCNTL
retains the value latched during the break.
Reset:
Read:
Write:
These read/write bits select one of the seven prescaler outputs as the
input to the TIM counter as
PS[2:0] bits.
Freescale Semiconductor, Inc.
PS2
0
0
0
0
1
1
1
1
For More Information On This Product,
Bit 15
Figure 10-5. TIM Counter Registers High (TCNTH)
Bit 7
0
Timer Interface Module (TIM)
Go to: www.freescale.com
PS1
0
0
1
1
0
0
1
1
= Unimplemented
14
6
0
Table 10-2. Prescaler Selection
PS0
0
1
0
1
0
1
0
1
13
5
0
Table 10-2
12
4
0
Internal bus clock
Internal bus clock
Internal bus clock
Internal bus clock
Internal bus clock
Internal bus clock
Internal bus clock
shows. Reset clears the
11
3
0
TIM Clock Source
MC68HC908JG16
TCLK
10
2
0
2
8
16
32
64
1
4
1
9
0
MOTOROLA
—
Rev. 1.0
Bit 0
Bit 8
0
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