PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 112

• Manufacturer Part Number: PCI-T32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 32B
• Manufacturer: Lattice

Specifications of PCI-T32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Table 2-43. 32-bit Target Burst Read Transaction with a 64-bit Local Interface (Continued)
CLK
10
8
9
Turn around
PCI Data
Phase
Data 3
Idle
Quad Word Aligned
If the PCI master is still ready to receive data, it keeps irdyn asserted and drives the next byte
enables (Byte Enable 3) on cben[3:0]. It signals the end of the burst when it de-asserts framen.
If the back-end keeps lt_rdyn asserted for the previous two cycles, the Core keeps trdyn
asserted and puts Data 3 on ad[31:0].
The Core de-asserts lt_ldata_xfern. If irdyn is asserted on the previous cycle, the Core
asserts lt_hdata_xfern to the back-end. With lt_hdata_xfern de-asserted on the previous
cycle, the back-end does not increment the address counter and holds the QWORD (Data 3 and
Data 4) on l_ad_in.
Double Word Aligned
If the master is still ready to receive data, it keeps irdyn asserted and drives the next byte
enables (Byte Enable 3) on cben[3:0]. It signals the end of the burst when it de-asserts framen.
The Core keeps trdyn asserted and puts Data 3 on ad[31:0] since it latched it with Data 2.
The Core de-asserts lt_hdata_xfern. If both irdyn and lt_rdyn are asserted on the previ-
ous cycle, the Core asserts lt_ldata_xfern to the back-end. With lt_hdata_xfern asserted
on the previous cycle, the back-end can increment the address counter and put the next QWORD
(Don’t care and Don’t care) on l_ad_in.
The master relinquishes control of framen and cben[3:0]. It de-asserts irdyn if both trdyn
and irdyn were asserted for the last cycle.
The PCI IP core relinquishes control of ad[31:0]. It de-asserts both devseln and trdyn. If both
trdyn and irdyn were asserted last cycle. The PCI IP core also signals to the back-end applica-
tion that the transaction is complete by clearing bar_hit. The target de-asserts
lt_hdata_xfern.
The Core relinquishes control of devseln and trdyn.
112
Description
Functional Description
PCI IP Core User’s Guide