PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 36

• Manufacturer Part Number: PCI-T32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 32B
• Manufacturer: Lattice

Specifications of PCI-T32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Figure 2-9. 64-bit Master Single Read Transaction with a 64-bit Local Interface
lm_burst_length[11:0]
lm_termination[2:0]
lm_burst_cnt[12:0]
l_data_out[63:32]
l_data_out[31:0]
lm_cben_in[3:0]
lm_cben_in[7:4]
lm_64bit_transn
lm_hdata_xfern
lm_ldata_xfern
l_ad_in[63:32]
lm_status[3:0]
l_ad_in[31:0]
lm_req64n
ad[63:32]
cben[3:0]
cben[7:4]
ad[31:0]
lm_gntn
lm_rdyn
devseln
ack64n
framen
req64n
par64
trdyn
irdyn
reqn
gntn
par
clk
1
2
Termination
Bus
3
Bus Length
Command
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Address
( = 1 )
Bus
4
5
Don’t care
Don’t care
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Address
Loading
36
Don’t care
Don’t care
6
Don’t care
Don’t care
Command
Address
Bus
Don’t care
7
Byte Enable 1
Byte Enable 2
Address
Parity
Transaction
Bus Length
8
( = 1 )
Bus
Byte Enable 1
Byte Enable 2
Don’t care
Don’t care
9
Data 1
Data 2
Data Parity 1
Data Parity 2
10
Functional Description
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Data 1
Data 2
PCI IP Core User’s Guide
Termination
Termination
11
Normal
Bus
0
Don’t care
Don’t care
12