PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 178

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PCI-T32-XP-N2

Manufacturer Part Number
PCI-T32-XP-N2
Description
FPGA - Field Programmable Gate Array PCI Target 32B
Manufacturer
Lattice
Datasheet

Specifications of PCI-T32-XP-N2

Factory Pack Quantity
1
Lattice Semiconductor
IPUG18_09.2, November 2010
PCI Assignment Considerations for LatticeSC Devices
PCI Pin Assignments for Master/Target 33 MHz 32-bit Bus
The PCI Master/Target 33 MHz 32-bit core is optimized for LFSC3GA25E-5F900C. An example pin assignment,
optimized for best performance, is given in
further information.
Table B-11. PCI Pin Assignments
PCI System Pins
PCI Address and Data
Signal Name
cben[0]
cben[1]
ad[10]
ad[11]
ad[12]
ad[13]
ad[14]
ad[15]
ad[16]
ad[17]
ad[18]
ad[19]
ad[20]
ad[21]
ad[22]
ad[23]
ad[24]
ad[25]
ad[26]
ad[27]
ad[28]
ad[29]
ad[30]
ad[31]
ad[0]
ad[1]
ad[2]
ad[3]
ad[4]
ad[5]
ad[6]
ad[7]
ad[8]
ad[9]
rstn
clk
Table
B-11. Refer to the readme file included with the core package for
Pin/Bank
AE13/5
AE12/5
AF10/5
AE11/5
AE10/5
AH10/5
AH11/5
AJ11/4
AH1/5
AK5/5
AK4/5
AH8/5
AH7/5
AK3/5
AH3/5
AG8/5
AG5/5
AH4/5
AD8/5
AD7/5
AK2/5
AD6/5
AH2/5
AG3/5
AE5/5
AF9/5
AF8/5
AF6/5
AF7/5
AJ8/5
AJ7/5
AJ6/5
AJ5/5
AJ4/5
AJ3/5
AJ2/5
178
Pin Assignments For Lattice FPGAs
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_IN
PCI33_IN
I/O Type
PCI IP Core User’s Guide

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