PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 60

• Manufacturer Part Number: PCI-T32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 32B
• Manufacturer: Lattice

Specifications of PCI-T32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Table 2-21. 64-bit Master Burst Read Transaction with a 64-bit Local Interface (Continued)
CLK
10
11
12
Data 5 and 6
Turn around
Phase
Idle
Since the previous data phase was completed, the Core transfers Data 3 and 4 on
l_data_out[63:0] and decreases the lm_burst_cnt.
If both trdyn and lm_rdyn were asserted on the previous cycle, the Core asserts
lm_ldata_xfern and lm_hdata_xfern to the local master to signify Data 3 and 4 are avail-
able on l_data_out[63:0]. With lm_ldata_xfern and lm_hdata_xfern asserted, the
local master can safely read Data 3 and 4 and increment the address counter.
With lm_rdyn asserted on the previous cycle, the Core keeps irdyn asserted.
Because the current transaction is the last, the Core de-asserts framen and req64n to signal the
end of the burst.
If the target is still ready to provide data, it keeps trdyn asserted and drives the next QWORD
(Data 5 and 6) on ad[63:0].
If the local master is ready to read the next QWORD, it keeps lm_rdyn asserted.
Since both irdyn and trdyn are asserted, the third data phase is completed on this cycle.
Since the previous data phase was completed, the Core transfers Data 5 and 6 on
l_data_out[63:0] and decreases the lm_burst_cnt to zero.
The Core relinquishes control of framen, req64n and cben. It de-asserts irdyn and changes
lm_status[3:0] into ‘Bus Termination’ with lm_termination as ‘Normal Termination’
because both trdyn and irdyn were asserted last cycle.
The target relinquishes control of ad[63:0]. It de-asserts devseln, ack64n and trdyn.
If both trdyn and lm_rdyn were asserted on the previous cycle, the Core asserts
lm_ldata_xfern and lm_hdata_xfern to the local master to signify Data 5 and 6 are avail-
able on l_data_out[63:0]. With lm_ldata_xfern and lm_hdata_xfern asserted, the
local master can safely read Data 5 and 6.
The Core relinquishes control of irdyn and de-asserts lm_ldata_xfern and
lm_hdata_xfern, and the local master de-asserts lm_rdyn since all of the burst data have
been read.
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Description
Functional Description
PCI IP Core User’s Guide