PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 179

• Manufacturer Part Number: PCI-T32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 32B
• Manufacturer: Lattice

Specifications of PCI-T32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Table B-11. PCI Pin Assignments (Continued)
PCI Pin Assignments for Master/Target 33 MHz 64-bit Bus
The PCI Master/Target 33 MHz 64-bit core is optimized for LFSC3GA25E-5F900C. An example pin assignment,
optimized for best performance, is given in
further information.
Table B-12. PCI Pin Assignments
PCI Interface Controls
PCI Interrupts
PCI Bus Arbitration
PCI System Pins
PCI Address and Data
Signal Name
Signal Name
devseln
cben[2]
cben[3]
framen
ad[10]
ad[11]
ad[12]
ad[13]
stopn
perrn
serrn
irdyn
trdyn
intan
ad[0]
ad[1]
ad[2]
ad[3]
ad[4]
ad[5]
ad[6]
ad[7]
ad[8]
ad[9]
idsel
gntn
reqn
rstn
par
clk
Table
B-12. Refer to the readme file included with the core package for
Pin/Bank
Pin/Bank
AG14/5
AG13/5
AF13/5
AE14/5
AF15/5
AH13/5
AH14/5
AE13/5
AE12/5
AF10/5
AE11/5
AJ12/5
AJ11/5
AH1/5
AK7/5
AK6/5
AK8/5
AK9/5
AK5/5
AK4/5
AH8/5
AH7/5
AK3/5
AF4/5
AJ1/5
AJ8/5
AJ7/5
AJ6/5
AJ5/5
AJ4/5
179
Pin Assignments For Lattice FPGAs
PCI33_OUT
PCI33_OUT
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_IN
PCI33_IN
PCI33_IN
PCI33_IN
I/O Type
I/O Type
PCI IP Core User’s Guide