PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 119

• Manufacturer Part Number: PCI-T32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 32B
• Manufacturer: Lattice

Specifications of PCI-T32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Table 2-46. 32-bit Target Fast Back-to-Back Transaction (Continued)
CLK
10
12
13
9
Wait
Data 1
Termination
Idle
PCI Data
Phase
If the DEVSEL_TIMING is set to slow, the Core asserts devseln on the clock after bar_hit. If
the back-end will be ready to write data in two cycles, it can assert lt_rdyn.
trdyn is asserted since lt_rdyn was asserted the previous cycle.
If both irdyn and trdyn are asserted on the previous cycle, the master relinquishes control of
framen, ad[31:0] and cben[3:0]. It also de-asserts irdyn if both trdyn and irdyn were
asserted last cycle.
The Core relinquishes devseln and trdyn.
119
Description
Functional Description
PCI IP Core User’s Guide