PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 89

• Manufacturer Part Number: PCI-T32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 32B
• Manufacturer: Lattice

Specifications of PCI-T32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
The 64-bit memory write transaction is similar to the 32-bit target write transaction with additional PCI signals
required for 64-bit signaling.
Figure 2-27. 64-bit Target Single Write Transaction with a 64-bit Local Interface
lt_command_out[3:0]
l_data_out[63:32]
l_data_out[31:0]
lt_cben_out[3:0]
lt_cben_out[7:4]
Figure 2-27
lt_64bit_transn
lt_address_out
lt_hdata_xfern
lt_ldata_xfern
bar_hit[5:0]
lt_accessn
ad[63:32]
cben[3:0]
cben[7:4]
ad[31:0]
devseln
framen
ack64n
lt_r_nw
req64n
lt_rdyn
par64
irdyn
trdyn
par
clk
1
Don’t care
Don’t care
Don’t care
Don’t care
Command
Address
and
Bus
Don’t care
Don’t care
0x00
2
Table 2-31
Don’t care
Address
Parity
3
Don’t care
Don’t care
Byte Enable 1
Byte Enable 2
89
show a basic 64-bit write transaction.
4
Data 1
Data 2
Bus Command
Byte Enable 1
Byte Enable 2
Data Parity 1
Data Parity2
5
Address
0x01
6
Data 1
Data 2
7
Don’t care
Don’t care
Don’t care
Don’t care
0x00
8
Functional Description
PCI IP Core User’s Guide