PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 168

• Manufacturer Part Number: PCI-T32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 32B
• Manufacturer: Lattice

Specifications of PCI-T32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
Table B-4. PCI Pins Assignments (Continued)
Table B-5. PCI Pins Assignments
IPUG18_09.2, November 2010
Pin Assignment Considerations for LatticeXP Devices
PCI Pin Assignments for Master/Target 33MHz 32-Bit Bus
The PCI Master/Target 33MHz 32-bit core is optimized for LFXP10-4F388C. An example pin assignment, opti-
mized for best performance, is given in
ther information.
PCI Interface Controls
PCI Interrupts
PCI System Pins
PCI Address and Data
Signal Name
Signal Name
Framen
devseln
cben[3]
stopn
perrn
trdyn
serrn
irdyn
Idsel
intan
ad[10]
ad[11]
ad[12]
ad[13]
ad[14]
ad[15]
ad[16]
ad[17]
Par
ad[0]
ad[1]
ad[2]
ad[3]
ad[4]
ad[5]
ad[6]
ad[7]
ad[8]
ad[9]
Table
rstn
clk
B-5. Refer to the readme file included with the core package for fur-
Pin/Bank
Pin/ Bank
AB18/4
AA18/4
AB17/4
AA17/4
AB16/4
AA16/4
AB15/4
AA15/4
AB14/4
AA14/4
AA13/4
AA10/5
W13/4
W12/4
AA4/5
Y18/4
Y14/4
Y13/4
Y17/4
AF10/5
AA12/5
AB12/5
AC12/5
AE12/5
AD12/5
AE10/5
U1/6
AB6/5
AE9/5
AA6/5
AF9/5
168
LVCMOS33_IN
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
BufferType
PCI33_IN
Buffer Type
PCI33_OUT
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
Pin Assignments For Lattice FPGAs
PCI33_IN
PCI IP Core User’s Guide