PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 64

• Manufacturer Part Number: PCI-T32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 32B
• Manufacturer: Lattice

Specifications of PCI-T32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
Functional Description
If the starting address is QWORD aligned, the first DWORD is assumed to be the lower DWORD of a QWORD.
Otherwise, it is the upper DWORD. If the starting address is not QWORD aligned, it must be DWORD aligned.
Figure 2-19
and
Table 2-23
illustrate a burst transaction to a 32-bit PCI IP core with a 64-bit Local Master Interface.
The figure illustrates how the PCI interface correlates to the Local Master Interface. The table gives a clock-by-
clock description of each event in the figure.
IPUG18_09.2, November 2010
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PCI IP Core User’s Guide