PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 34

• Manufacturer Part Number: PCI-T32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 32B
• Manufacturer: Lattice

Specifications of PCI-T32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Figure 2-8
write transaction.
Figure 2-8. 32-bit Master Single Write Transaction with a 32-bit Local Interface
lm_burst_length[11:0]
lm_termination[2:0]
lm_burst_cnt[12:0]
lm_cben_in[3:0]
illustrates a basic 32-bit write transaction.
lm_data_xfern
lm_status[3:0]
l_ad_in[31:0]
lm_req32n
cben[3:0]
ad[31:0]
lm_gntn
lm_rdyn
devseln
framen
trdyn
irdyn
reqn
gntn
par
clk
1
Don’t care
Don’t care
Don’t care
2
Termination
Bus
3
Don’t care
Bus Length
Command
Address
4
( = 1 )
Bus
Don’t care
5
Table 2-12
34
Don’t care
Don’t care
Address
Loading
6
Don’t care
Command
gives a clock-by-clock description of the 32-bit
Enable 1
Address
Data 1
Byte
Bus
7
Transaction
Bus Length
Address
Parity
( = 1 )
Bus
Enable 1
8
Data 1
Byte
Don’t care
Functional Description
Data Parity 1
Don’t care
Don’t care
9
PCI IP Core User’s Guide
Termination
Termination
10
Normal
Bus
0
11