PCI-T32-XP-N2 Lattice, PCI-T32-XP-N2 Datasheet - Page 52

• Manufacturer Part Number: PCI-T32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Target 32B
• Manufacturer: Lattice

Specifications of PCI-T32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Figure 2-15. 32-bit Master Burst Read Transaction with a 32-bit Local Interface
Table 2-19. 32-bit Master Burst Read Transaction with a 32-bit Local Interface
CLK
1
2
3
4
5
lm_burst_length[11:0]
lm_termination[2:0]
lm_burst_cnt[12:0]
l_data_out[31:0]
lm_cben_in[3:0]
lm_data_xfern
lm_status[3:0]
l_ad_in[31:0]
lm_req32n
cben[3:0]
ad[31:0]
lm_gntn
lm_rdyn
devseln
framen
irdyn
trdyn
reqn
gntn
par
clk
Phase
Idle
Idle
Idle
Idle
Idle
1
The lm_req32n signal is asserted by the local master to request a 32-bit data transaction. The
local master issues the PCI starting address, the bus command, and the burst length during the
same clock cycle to l_ad_in, lm_cben_in, and lm_burst_length, respectively.
The Core’s Local Master Interface detects the asserted lm_req32n and asserts reqn to request
the use of PCI bus.
gntn is asserted to grant the Core access to the PCI bus. Core is now the PCI master.
Since gntn is asserted and the current bus is idle, the Core starts the bus transactions. The mas-
ter asserts lm_gntn to inform the local master that the bus request is granted.
If both lm_req32n and gntn were asserted on the previous cycle, lm_status[3:0] is
changed to ‘Address Loading’ to indicate the starting address, the bus command, and the burst
length are being latched.
2
Termination
Bus
3
Bus Length
Command
Don’t care
Address
( = 3 )
Bus
4
Don’t care
5
Don’t care
Don’t care
Address
Loading
Don’t care
6
52
Don’t care
Command
Address
Bus
7
Description
Bus Length
Address
( = 3 )
Parity
Byte Enable 1
8
Transaction
Data 1
Bus
Byte Enable 1
9
Don’t care
Don’t care
Parity 1
Data 2
Data 1
Data
2
10
Functional Description
Parity 2
Data 3
Data 2
Data
1
PCI IP Core User’s Guide
11
Don’t care
Parity 3
Data 3
Data
Termination
Termination
12
Normal
Bus
0
Don’t care
13