MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 106

• Manufacturer Part Number: MCF5407CAI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407CAI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Processor Series: MCF540x
• Core: ColdFire V4
• Data Bus Width: 32 bit
• Program Memory Size: 8 KB
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 162 MHz
• Number Of Programmable I/os: 16
• Operating Supply Voltage: 1.8 V to 3.3 V
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ColdFire Instruction Set Architecture Enhancements
CMP
Operation:
Assembler Syntax: CMP <ea>y, Dx
Attributes:
Description: Subtracts the source operand from the destination operand in the data register
and sets condition codes according to the result; the data register is unchanged. The
operation size may be a byte, word, or longword.
CMPA is used when the destination is an address register; CMPI is used when the source
is immediate data. Most assemblers automatically make this distinction.
Condition Codes:
Instruction Fields:
Ay (word/longword operand only)
2-40
Instruction
Format:
—
X
• Register field—specifies the destination register.
• Opmode field:
• Effective address field specifies the source operand; use addressing modes in the
Addressing Mode
following table:
N
∗
(d
(Ay) +
– (Ay)
(Ay)
16
Dy
,Ay)
Z
∗
15
1
Operand sizes supported
14
0
V
∗
Opcode present
Destination – Source → cc
Size = byte, word, long
13
1
CMP
C
∗
Byte
000
Mode
000
001
010
011
100
101
12
1
X Not affected
N Set if the result is negative; cleared otherwise
Z Set if the result is zero; cleared otherwise
V Set if an overflow occurs; cleared otherwise
C Set if a borrow occurs; cleared otherwise
11
Word
MCF5407 User’s Manual
REGISTER
001
reg. number:Dy
reg. number:Ay
reg. number:Ay
reg. number:Ay
reg. number:Ay
reg. number:Ay
Register
10
Compare
Long
9
010
V2, V3 Core
8
OPMODE
Yes
.l
Addressing Mode
7
Dx - <ea>y
Operation
(d
(d
(d
#<data>
(xxx).W
(xxx).L
8
8
6
16
,PC,Xi)
,Ay,Xi)
,PC)
5
MODE
EFFECTIVE ADDRESS
4
V4 Core
.b, .w, .l
Yes
Mode
110
111
111
111
111
111
3
2
reg. number:Ay
REGISTER
Register
CMP
000
001
100
010
011
1
0