MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 531
![IC MPU 32B 220MHZ COLDF 208-FQFP](/photos/12/22/122277/mcf5407cai220_sml.jpg)
MCF5407CAI220
Manufacturer Part Number
MCF5407CAI220
Description
IC MPU 32B 220MHZ COLDF 208-FQFP
Manufacturer
Freescale Semiconductor
Series
MCF540xr
Specifications of MCF5407CAI220
Core Processor
Coldfire V4
Core Size
32-Bit
Speed
220MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Processor Series
MCF540x
Core
ColdFire V4
Data Bus Width
32 bit
Program Memory Size
8 KB
Data Ram Size
4 KB
Maximum Clock Frequency
162 MHz
Number Of Programmable I/os
16
Operating Supply Voltage
1.8 V to 3.3 V
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Cpu Speed
220MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3.3V
Rohs Compliant
Yes
For Use With
M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale
Quantity:
789
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Glossary of Terms and Abbreviations
The glossary contains an alphabetical list of terms, phrases, and abbreviations used in this
book.
B
A
C
Architecture. A detailed specification of requirements for a processor or
Autovector. A method of determining the starting address of the service
Branch folding. The replacement with target instructions of a branch
Branch prediction.The process of guessing whether a branch will be taken.
Burst. A multiple-beat data transfer.
Cache. High-speed memory containing recently accessed data and/or
Cache coherency. An attribute wherein an accurate and common view of
computer system. It does not specify details of how the processor or
computer system must be implemented; instead it provides a
template for a family of compatible implementations.
routine by fetching the value from a lookup table internal to the
processor instead of requesting the value from the system.
instruction and any instructions along the not-taken path when a
branch is either taken or predicted as taken.
Such predictions can be correct or incorrect; the term ‘predicted’ as
it is used here does not imply that the prediction is correct
(successful). Branch resolution.The determination of whether a
branch is taken or not taken. A branch is said to be resolved when the
processor can determine which instruction path to take. If the branch
is resolved as predicted, the instructions following the predicted
branch that may have been speculatively executed can complete (see
completion). If the branch is not resolved as predicted, instructions
on the mispredicted path, and any results of speculative execution,
are purged from the pipeline and fetching continues from the
nonpredicted path.
instructions (subset of main memory).
memory is provided to all devices that share the same memory
Glossary of Terms and Abbreviations
Glossary-1
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