MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 93

• Manufacturer Part Number: MCF5407CAI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407CAI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Processor Series: MCF540x
• Core: ColdFire V4
• Data Bus Width: 32 bit
• Program Memory Size: 8 KB
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 162 MHz
• Number Of Programmable I/os: 16
• Operating Supply Voltage: 1.8 V to 3.3 V
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.7.3 Execution Timings—Two-Operand Instructions
Table 2-15 shows standard timings for two-operand instructions.
Opcode
Opcode
negx.l
addq.l
addx.l
ext.w
extb.l
sats.l
swap
addi.l
andi.l
neg.l
tst.w
clr.w
add.l
add.l
and.l
and.l
bchg
clr.b
ext.l
not.l
tst.b
asr.l
tst.l
asl.l
clr.l
scc
tas
<ea>
<ea>
<ea>
<ea>
<ea>
<ea>
<ea>
<ea>
#imm,<ea>
Dx
Dx
Dx
Dx
Dx
Dx
Dx
Dx
Dx
#imm,Dx
#imm,Dx
<ea>,Rx
<ea>,Rx
<ea>,Dx
<ea>,Dx
Dy,<ea>
Dy,<ea>
Dy,<ea>
Dy,Dx
<ea>
Table 2-15. Two-Operand Instruction Execution Times
Table 2-14. One-Operand Instruction Execution Times
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(1/1)
1(0/0)
1(0/0)
1(0/0)
Rn
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
2(0/0)
Rn
—
—
1(0/1)
1(0/1)
1(0/1)
1(1/1)
1(1/0)
1(1/0)
1(1/0)
(An)
—
—
—
—
—
—
—
—
—
1(1/0)
1(1/1)
1(1/1)
1(1/0)
1(1/1)
2(1/1)
(An)
—
—
—
—
—
Chapter 2. ColdFire Core
(An)+
1(0/1)
1(0/1)
1(0/1)
1(1/1)
1(1/0)
1(1/0)
1(1/0)
—
—
—
—
—
—
—
—
—
(An)+
1(1/0)
1(1/1)
1(1/1)
1(1/0)
1(1/1)
2(1/1)
—
—
—
—
—
1(0/1)
1(0/1)
1(0/1)
1(1/1)
1(1/0)
1(1/0)
1(1/0)
-(An)
1(1/0)
1(1/1)
1(1/1)
1(1/0)
1(1/1)
2(1/1)
-(An)
—
—
—
—
—
—
—
—
—
Effective Address
—
—
—
—
—
Effective Address
(d16,An)
(d16,An) (d8,An,Xi*SF)
1(0/1)
1(0/1)
1(0/1)
1(1/1)
1(1/0)
1(1/0)
1(1/0)
1(1/0)
1(1/1)
1(1/1)
1(1/0)
1(1/1)
2(1/1)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(d8,An,Xi*SF)
2(0/1)
2(0/1)
2(0/1)
2(1/1)
2(1/0)
2(1/0)
2(1/0)
2(1/0)
2(1/1)
2(1/1)
2(1/0)
2(1/1)
3(1/1)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Execution Timings
(xxx).wl
(xxx).wl
1(1/0)
1(1/1)
1(1/1)
1(1/0)
1(1/1)
2(1/1)
1(0/1)
1(0/1)
1(0/1)
1(1/1)
1(1/0)
1(1/0)
1(1/0)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
#<xxx>
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
#xxx
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
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