MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 34

• Manufacturer Part Number: MCF5407CAI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407CAI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Processor Series: MCF540x
• Core: ColdFire V4
• Data Bus Width: 32 bit
• Program Memory Size: 8 KB
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 162 MHz
• Number Of Programmable I/os: 16
• Operating Supply Voltage: 1.8 V to 3.3 V
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20-7
20-8
20-9
20-10
20-11
20-12
20-13
20-14
20-15
20-16
A-1
A-2
A-3
A-4
A-5
A-6
A-7
A-8
A-9
A-10
A-11
A-12
A-13
B-1
B-2
B-3
B-4
B-5
B-6
B-7
B-8
B-9
B-10
Table
Number
xxxiv
Output AC Timing Specification ................................................................................ 20-6
Reset Timing Specification....................................................................................... 20-15
Debug AC Timing Specification .............................................................................. 20-16
Timer Module AC Timing Specification.................................................................. 20-17
I
I
UART Module AC Timing Specifications ............................................................... 20-19
General-Purpose I/O Port AC Timing Specifications............................................... 20-22
DMA AC Timing Specifications .............................................................................. 20-23
IEEE 1149.1 (JTAG) AC Timing Specifications ..................................................... 20-24
Differences between MCF5307 and MCF5407........................................................... A-1
MOVEC CPU Space Register Map ............................................................................. A-4
TM[2:1] Encoding for MCF5307 Internal DMA as Master (TT = 01) ....................... A-4
TM0 Encoding for MCF5307 Internal DMA as Master (TT = 01) ............................. A-5
Divide Ratio Encodings ............................................................................................... A-7
D[7:0] Multiplexing ..................................................................................................... A-8
D7/AA, Automatic Acknowledge of Boot CS0........................................................... A-9
D[6:5]/PS[1:0], Port Size of Boot CS0 ........................................................................ A-9
D4/ADDR_CONFIG, Address Pin Assignment.......................................................... A-9
D3/BE_CONFIG, BE[3:0] Boot Configuration .......................................................... A-9
Definition of DRc Encoding—Write ......................................................................... A-13
Debug C Exception Vector Assignments .................................................................. A-16
Version 4 Debug C Processor Status Encodings ....................................................... A-17
SIM Registers................................................................................................................B-1
Interrupt Controller Registers .......................................................................................B-1
Chip-Select Registers....................................................................................................B-2
DRAM Controller Registers .........................................................................................B-3
General-Purpose Timer Registers .................................................................................B-4
UART0 Control Registers.............................................................................................B-4
UART1 Control Registers.............................................................................................B-6
Parallel Port Memory Map............................................................................................B-7
I
DMA Controller Registers............................................................................................B-8
2
2
2
C Input Timing Specifications between SCL and SDA......................................... 20-18
C Output Timing Specifications between SCL and SDA ...................................... 20-18
C Interface Memory Map...........................................................................................B-8
MCF5407 User’s Manual
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