MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 430
![IC MPU 32B 220MHZ COLDF 208-FQFP](/photos/12/22/122277/mcf5407cai220_sml.jpg)
MCF5407CAI220
Manufacturer Part Number
MCF5407CAI220
Description
IC MPU 32B 220MHZ COLDF 208-FQFP
Manufacturer
Freescale Semiconductor
Series
MCF540xr
Specifications of MCF5407CAI220
Core Processor
Coldfire V4
Core Size
32-Bit
Speed
220MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Processor Series
MCF540x
Core
ColdFire V4
Data Bus Width
32 bit
Program Memory Size
8 KB
Data Ram Size
4 KB
Maximum Clock Frequency
162 MHz
Number Of Programmable I/os
16
Operating Supply Voltage
1.8 V to 3.3 V
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Cpu Speed
220MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3.3V
Rohs Compliant
Yes
For Use With
M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale
Quantity:
789
Company:
Part Number:
MCF5407CAI220
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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1
Bus Characteristics
18.3 Bus Characteristics
The MCF5407 uses an input clock signal (CLKIN) to generate its internal clock and
outputs BCLKO, which is provided for backwards compatibility for MCF5307 designs.
CLKIN is the bus clock rate, where all bus operations are synchronous to the rising edge of
CLKIN. Some of the bus control signals (BE/BWE, OE, CSx, and AS) are synchronous to
the falling edge, shown in Figure 18-1. Bus characteristics may differ somewhat for
interfacing with external DRAM.
18.4 Data Transfer Operation
Data transfers between the MCF5407 and other devices involve the following signals:
18-2
These signals change after the falling edge. In Chapter 20, “Electrical Specifications,” these signals are specified
off the rising edge because CLKIN is squared up internally.
Falling-Edge
Rising-Edge
Signal Name
IRQ[7,5,3,1]
SIZ[1:0]
TM[2:0]
TT[1:0]
Signals
Signals
OE
R/W
CLKIN
TIP
TS
Inputs
t
t
t
t
TA
vo
ho
si
hi
=Required input setup time relative to CLKIN edge
=Required input hold time relative to CLKIN edge
=Propagation delay of signal relative to CLKIN edge
=Output hold time relative to CLKIN edge
1
Figure 18-1. Signal Relationship to CLKIN for Non-DRAM Access
Table 18-1. ColdFire Bus Signal Summary (Continued)
Interrupt request
Output enable
Read/write
Transfer size
Transfer acknowledge
Transfer in progress
Transfer modifier
Transfer start
Transfer type
Description
t
si
t
t
vo
hi
MCF5407 User’s Manual
I
O
O
O
I
O
O
O
O
MCF5407 Master
t
vo
I
I
I
I
O
Three-state
Three-state
I
Three-state
External Master
t
ho
Rising
Falling
Rising
Rising
Rising
Rising
Rising
Rising
Rising
Edge
t
ho
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