MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 347

• Manufacturer Part Number: MCF5407CAI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407CAI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Processor Series: MCF540x
• Core: ColdFire V4
• Data Bus Width: 32 bit
• Program Memory Size: 8 KB
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 162 MHz
• Number Of Programmable I/os: 16
• Operating Supply Voltage: 1.8 V to 3.3 V
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
2
3
14.3.1 UART Mode Registers 1 (UMR1n)
The UART mode registers 1 (UMR1n) control configuration. UMR1n can be read or
written when the mode register pointer points to it, at RESET or after a
REGISTER POINTER
pointer points to UMR2n.
0x1E0–
UART0
0x1DC
0x1EC
0x1FC
0x1F0
0x1F4
0x1F8
UMR1n, UMR2n, and UCSRn should be changed only after the receiver/transmitter is issued a software reset
command. That is, if channel operation is not disabled, undesirable results may occur.
This address is for factory testing. Reading this location results in undesired effects and possible incorrect
transmission or reception of characters. Register contents may also be changed.
Address-triggered commands
MBAR Offset
UART1
0x220–
0x21C
0x22C
0x23C
0x230
0x234
0x238
Table 14-1. UART Module Programming Model (Continued)
UART registers are accessible only as bytes. Although external
masters cannot access on-chip memories or MBAR, they can
access any UART registers.
registers—(UDLn) [p.
14-19]
Do not access
register—(UIVRn) [p.
14-20]
port registers—(UIPn)
[p. 14-20]
(Write) Do not access
(Write) UART output
port bit set command
registers—(UOP1n
[p. 14-21]
(Write) UART output
port bit reset
command
registers—(UOP0n
[p. 14-21]
UART divider lower
UART interrupt vector
(Read) UART input
(Read) Do not access
(Read) Do not access
command using UCRn[MISC]. After UMR1n is read or written, the
[31:24]
2
3
3
)
)
Chapter 14. UART Modules
2
2
2
—
—
—
—
—
—
—
—
—
[23:16]
NOTE:
[15:8]
Register Descriptions
RESET MODE
[7:0]
14-5