MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 11

• Manufacturer Part Number: MCF5407CAI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407CAI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Processor Series: MCF540x
• Core: ColdFire V4
• Data Bus Width: 32 bit
• Program Memory Size: 8 KB
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 162 MHz
• Number Of Programmable I/os: 16
• Operating Supply Voltage: 1.8 V to 3.3 V
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.5.1
8.5.2
8.5.3
8.5.4
8.5.5
8.6
8.6.1
8.6.2
8.6.3
8.6.4
8.6.5
8.6.6
8.6.7
9.1
9.2
9.2.1
9.2.2
9.2.3
9.2.4
10.1
10.2
10.3
10.3.1
10.3.1.1
10.3.1.2
10.4
10.4.1
10.4.1.1
10.4.1.2
10.4.1.3
10.4.1.4
Paragraph
Number
Synchronous/Asynchronous DRAM Controller Module
I
Overview............................................................................................................. 9-1
Interrupt Controller Registers ............................................................................. 9-2
Overview........................................................................................................... 10-1
Chip-Select Module Signals ............................................................................. 10-1
Chip-Select Operation....................................................................................... 10-2
Chip-Select Registers........................................................................................ 10-5
2
C Programming Examples ............................................................................. 8-10
I
I
I
I
I
Initialization Sequence.................................................................................. 8-10
Generation of START................................................................................... 8-10
Post-Transfer Software Response................................................................. 8-11
Generation of STOP...................................................................................... 8-12
Generation of Repeated START................................................................... 8-12
Slave Mode ................................................................................................... 8-13
Arbitration Lost............................................................................................. 8-13
Interrupt Control Registers (ICR0–ICR9) ...................................................... 9-3
Autovector Register (AVR) ............................................................................ 9-5
Interrupt Pending and Mask Registers (IPR and IMR)................................... 9-6
Interrupt Port Assignment Register (IRQPAR) .............................................. 9-7
General Chip-Select Operation..................................................................... 10-3
Chip-Select Module Registers ...................................................................... 10-6
2
2
2
2
2
C Address Register (IADR) ......................................................................... 8-6
C Frequency Divider Register (IFDR)......................................................... 8-6
C Control Register (I2CR) ........................................................................... 8-7
C Status Register (I2SR).............................................................................. 8-8
C Data I/O Register (I2DR) ......................................................................... 8-9
8-, 16-, and 32-Bit Port Sizing.................................................................. 10-4
Global Chip-Select Operation................................................................... 10-4
Chip-Select Address Registers (CSAR0–CSAR7) ................................... 10-6
Chip-Select Mask Registers (CSMR0–CSMR7)...................................... 10-7
Chip-Select Control Registers (CSCR0–CSCR7) .................................... 10-8
Code Example........................................................................................... 10-9
Chip-Select Module
Interrupt Controller
CONTENTS
Chapter 10
Chapter 11
Chapter 9
Contents
Title
Number
Page
xi