MCF5407CAI220 Freescale Semiconductor, MCF5407CAI220 Datasheet - Page 64

• Manufacturer Part Number: MCF5407CAI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407CAI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-FQFP
• Processor Series: MCF540x
• Core: ColdFire V4
• Data Bus Width: 32 bit
• Program Memory Size: 8 KB
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 162 MHz
• Number Of Programmable I/os: 16
• Operating Supply Voltage: 1.8 V to 3.3 V
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Suggested Reading
The following literature may be helpful with respect to the topics in Part I:
Acronyms and Abbreviations
Table I-i contains acronyms and abbreviations are used in Part I.
I-xx
ADC
ALU
BDM
BIST
BSDL
CODEC
DAC
DMA
DSP
EA
EDO
FIFO
GPIO
I
IEEE
IFP
IPL
JEDEC
JTAG
LIFO
2
• Chapter 5, “Debug Support,” describes the Revision C enhanced hardware debug
• ColdFire Programmers Reference Manual, R1.0 (MCF5200PRM/AD)
• Using Microprocessors and Microcomputers: The Motorola Family, William C.
C
Term
support in the MCF5407. This revision of the ColdFire debug architecture
encompasses earlier revisions.
Wray, Ross Bannatyne, Joseph D. Greenfield
Analog-to-digital conversion
Arithmetic logic unit
Background debug mode
Built-in self test
Boundary-scan description language
Code/decode
Digital-to-analog conversion
Direct memory access
Digital signal processing
Effective address
Extended data output (DRAM)
First-in, first-out
General-purpose I/O
Inter-integrated circuit
Institute for Electrical and Electronics Engineers
Instruction fetch pipeline
Interrupt priority level
Joint Electron Device Engineering Council
Joint Test Action Group
Last-in, first-out
Table I-i. Acronyms and Abbreviated Terms
MCF5407 User’s Manual
Meaning