DF2506BR26DV Renesas Electronics America, DF2506BR26DV Datasheet - Page 401

IC H8S/2506 MCU FLASH 176-LFBGA

DF2506BR26DV

Manufacturer Part Number
DF2506BR26DV
Description
IC H8S/2506 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2506BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2506BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
This LSI has an on-chip 8-bit timer module with four channels. The 8-bit timer module can be
used to count external events and be used as a multifunction timer in a variety of applications,
such as generation of counter reset, interrupt requests, and pulse output with an arbitrary duty
cycle using a compare-match signal with two registers.
11.1
• Selection of four clock sources
• Selection of three ways to clear the counters
• Timer output controlled by two compare-match signals
• Cascading of the two channels
• Multiple interrupt sources for each channel
• Generation of A/D converter conversion start trigger
• Module stop mode can be set
Selected from three internal clocks (φ/8, φ/64, and φ/8192) and an external clock
The counters can be cleared on compare-match A or B, or by an external reset signal
The timer output signal in each channel is controlled by two independent compare-match
signals, enabling the timer to be used for various applications, such as the generation of pulse
output or PWM output with an arbitrary duty cycle
(Cascading of TMR_0, TMR_1)
The module can operate as a 16-bit timer using TMR_0 as the upper half and TMR_1 as the
lower half (16-bit count mode)
TMR_1 can be used to count TMR_0 compare-match occurrences (compare-match count
mode)
(Cascading of TMR_2, TMR_3)
The module can operate as a 16-bit timer using TMR_2 as the upper half and TMR_3 as the
lower half (16-bit count mode)
TMR_3 can be used to count TMR_2 compare-match occurrences (compare-match count
mode)
Two compare-match interrupts and one overflow interrupt can be requested independently
Channel 0 compare-match signal can be used as the A/D converter conversion start trigger
As the initial setting, the 8-bit timer operation is halted. Register access is enabled by
canceling the module stop mode.
Features
Section 11 8-Bit Timers (TMR)
Rev. 6.00 Sep. 24, 2009 Page 353 of 928
Section 11 8-Bit Timers (TMR)
REJ09B0099-0600

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