DF2506BR26DV Renesas Electronics America, DF2506BR26DV Datasheet - Page 653

IC H8S/2506 MCU FLASH 176-LFBGA

DF2506BR26DV

Manufacturer Part Number
DF2506BR26DV
Description
IC H8S/2506 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2506BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2506BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(4)
When retransfer is performed up to the maximum number of transfer bytes defined by the protocol
because of reception of a NAK from the receive side during data field transmission, the number of
transferred bytes may be less than that of bytes specified by the message length. At this time the
RO flag is set. Moreover, when the value of the message length bits is greater than the maximum
number of transfer bytes, the RO flag is also set. The RO flag is not set if the maximum number of
transfer bytes defined by the protocol is specified (for example, 32-byte message length is
specified in mode 1) and the transfer is performed correctly.
If the RO flag is set to 1, the TxE flag is set to 1 and the wait state is entered.
(5)
• If a NAK is received in an acknowledge bit before the message length field transmission, the
• If a NAK is received in an acknowledge bit of the data field, data is automatically
Note: Even if a NAK is received from the receive side during the data field transmission,
17.6.5
(1)
When the OVE flag is set, the RxE flag is also set. If an overrun error is cleared and the OVE flag
is also cleared, the IEBus receive operation is continued. For details, see section 17.6.3, RxRDY
Flag and Overrun Error.
(2)
If a timing error occurs during data reception after reception starts (the RxS flag is set to 1), the
RTME flag is set to 1, RxE flag is set to 1, and the wait state is entered. When a timing error
occurs before reception starts, this flag is not set and the reception frame is discarded.
ACK flag is set, the TxE flag is set, and then the wait state is entered.
retransmitted up to the maximum number of transfer bytes defined by the protocol. If an ACK
is received in an acknowledge bit during retransfer and the following data is transmitted
correctly, the ACK flag is not set. If a NAK is received in the last data transfer during the
retransfer for the maximum number of transfer bytes, the ACK flag is set to 1 and the wait
state is entered.
RO Flag
ACK Flag
OVE Flag
RTME Flag
retransfer is performed up to the maximum number of transfer bytes defined by the
protocol, and the number of transferred bytes is less than that of bytes specified by the
message length bits, an ACK may be received in the acknowledge bit in the last data
transfer. In this case, the ACK flag is not set although the RO flag is set.
Error Flags in IEREF
Section 17 IEBus™ Controller (IEB) [H8S/2552 Group]
Rev. 6.00 Sep. 24, 2009 Page 605 of 928
REJ09B0099-0600

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