DF2506BR26DV Renesas Electronics America, DF2506BR26DV Datasheet - Page 405

• Manufacturer Part Number: DF2506BR26DV
• Description: IC H8S/2506 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2506BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.3.3
TCORB is an 8-bit readable/writable register. TCORB_0 and TCORB_1 (or TCORB_2 and
TCORB_3) comprise a single 16-bit register, so they can be accessed together by word access.
TCORB is continually compared with the value in TCNT. When a match is detected, the
corresponding compare-match flag B (CMFB) in TCSR is set. Note, however, that comparison is
disabled during the T
The timer output from the TMO pin can be freely controlled by the compare-match signal B and
the settings of the output select bits, OS1 and OS0, in TCSR.
The initial value of TCORB is H'FF.
11.3.4
TCR selects the TCNT clock source and the time at which TCNT is cleared, and controls interrupt
requests.
Bit
7
6
5
Bit Name
CMIEB
CMIEA
OVIE
Time Constant Register B (TCORB)
Timer Control Register (TCR)
Initial
Value
0
0
0
2
state of a TCORB write cycle.
R/W
R/W
R/W
R/W
Description
Compare-Match Interrupt Enable B
Selects whether the CMFB interrupt request (CMIB) is
enabled or disabled when the CMFB flag in TCSR is set to
1.
0: CMFB interrupt request (CMIB) is disabled
1: CMFB interrupt request (CMIB) is enabled
Compare-Match Interrupt Enable A
Selects whether the CMFA interrupt request (CMIA) is
enabled or disabled when the CMFA flag in TCSR is set to
1.
0: CMFA interrupt request (CMIA) is disabled
1: CMFA interrupt request (CMIA) is enabled
Timer Overflow Interrupt Enable
Selects whether the OVF interrupt request (OVI) is enabled
or disabled when the OVF flag in TCSR is set to 1.
0: OVF interrupt request (OVI) is disabled
1: OVF interrupt request (OVI) is enabled
Rev. 6.00 Sep. 24, 2009 Page 357 of 928
Section 11 8-Bit Timers (TMR)
REJ09B0099-0600