HD64F3644H Renesas Electronics America, HD64F3644H Datasheet - Page 163

IC H8 MCU FLASH 32K 64-QFP

HD64F3644H

Manufacturer Part Number
HD64F3644H
Description
IC H8 MCU FLASH 32K 64-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644H

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Package
64PQFP
Family Name
H8
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
45
Interface Type
SCI
On-chip Adc
8-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Notes: 1. In this sample program, the stack pointer (SP) is set to address H'FF80. On-chip RAM
FLMCR:
EBR1:
EBR2:
TCSRW:
TCW:
STACK:
START:
;
;
;
;
PRETST: CMP.B #H'0C,
EBR2PW: BTST
PWADD1: INC
Set R0 value as explained on previous page. This sample program erases
all blocks.
#RAMSTR is start address of RAM area to which program is transferred
Set #RAMSTR to even number
2. It is assumed that this program, written in the ROM area, is transferred to the RAM
addresses H'FF7E and H'FF7F are used as a stack area. Therefore addresses H'FF7E
and H'FF7F should not be used when this program is executed, and on-chip RAM
should not be disabled.
area and executed there. For #RAMSTR in the program, substitute the start address of
the RAM area to which the program is transferred. The value set for #RAMSTR must
be an even number.
.EQU
.EQU
.EQU
.EQU
.EQU
.EQU
.ALIGN 2
MOV.W #STACK,
MOV.W #H'0FFF,
MOV.B R0H,
MOV.B R0L,
MOV.W #RAMSTR, R2
MOV.W #ERVADR, R3
ADD.W R3,
MOV.W #START,
SUB.W R3,
MOV.B #H'00,
BEQ
CMP.B #H'08,
BMI
MOV.B R1L,
SUBX
BTST
BNE
BRA
BNE
H'FF80
H'FF82
H'FF83
H'FFBE
H'FFBF
H'FF80
ERASES
EBR2PW
#H'08,
R1H,
PREWRT
R1L,
PREWRT
R1L
SP
R0
@EBR1
@EBR2
R2
R3
R2
R1L
R1L
R1L
R1H
R1H
R0H
PWADD1
R0L
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
Set stack pointer
Select blocks to be erased (R0: EBR1/EBR2)
Set EBR1
Set EBR2
Transfer destination start address (RAM)
#RAMSTR + #ERVADR
Address of data area used in RAM
Used to test bit R1L in R0
R1L = H'0C?
If finished checking all R0 bits, branch to ERASES
If R1L ≥ 8, EBR1 test; if R1L < 8, EBR2 test
R1L – 8
Test bit R1H in EBR1 (R0H
If bit R1H in EBR1 (R0H) is 1, branch to PREWRT
If bit R1H in EBR1 (R0H) is 0, branch to PWADD1
Test bit R1L in EBR2 (R0L)
If bit R1L in EBR2 (R0L) is 1, branch to PREWRT
R1L + 1
Rev. 6.00 Sep 12, 2006 page 141 of 526
R1H
R1L
)
R2
REJ09B0326-0600
Section 6 ROM

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