HD64F3644H Renesas Electronics America, HD64F3644H Datasheet - Page 295

IC H8 MCU FLASH 32K 64-QFP

HD64F3644H

Manufacturer Part Number
HD64F3644H
Description
IC H8 MCU FLASH 32K 64-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644H

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Package
64PQFP
Family Name
H8
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
45
Interface Type
SCI
On-chip Adc
8-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3644H
Manufacturer:
HITACHI
Quantity:
490
Part Number:
HD64F3644H
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3644H
Manufacturer:
HD
Quantity:
20 000
Company:
Part Number:
HD64F3644H
Quantity:
27
Part Number:
HD64F3644HV
Manufacturer:
Renesas
Quantity:
600
Part Number:
HD64F3644HV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3644HV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F3644HV/H83644
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Bit 1 Bit 0 Write Inhibit (B0WI): Bit 1 controls the writing of data to bit 0 in TCSRW.
This bit is always read as 1. Data written to this bit is not stored.
Bit 1: B0WI
0
1
Bit 0 Watchdog Timer Reset (WRST): Bit 0 indicates that TCW has overflowed, generating
an internal reset signal. The internal reset signal generated by the overflow resets the entire chip.
WRST is cleared to 0 by a reset from the RES pin, or when software writes 0.
Bit 0: WRST
0
1
Timer Counter W (TCW)
TCW is an 8-bit read/write up-counter, which is incremented by internal clock input. The input
clock is /8192. The TCW value can always be written or read by the CPU.
When TCW overflows from H'FF to H'00, an internal reset signal is generated and WRST is set to
1 in TCSRW. Upon reset, TCW is initialized to H'00.
Bit
Initial value
Read/Write
TCW7
R/W
Description
Bit 0 is write-enabled
Bit 0 is write-protected
Clearing conditions:
Setting condition:
When TCW overflows and an internal reset signal is generated
Description
7
0
Reset by RES pin
When TCSRWE = 1, and 0 is written in both B0WI and WRST
TCW6
R/W
0
6
TCW5
R/W
0
5
TCW4
R/W
4
0
Rev. 6.00 Sep 12, 2006 page 273 of 526
TCW3
R/W
3
0
TCW2
R/W
2
0
REJ09B0326-0600
TCW1
Section 9 Timers
R/W
1
0
(initial value)
(initial value)
TCW0
R/W
0
0

Related parts for HD64F3644H