HD64F3644H Renesas Electronics America, HD64F3644H Datasheet - Page 81

IC H8 MCU FLASH 32K 64-QFP

HD64F3644H

Manufacturer Part Number
HD64F3644H
Description
IC H8 MCU FLASH 32K 64-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644H

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Package
64PQFP
Family Name
H8
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
45
Interface Type
SCI
On-chip Adc
8-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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3.1
Exception handling is performed in the H8/3644 Group when a reset or interrupt occurs. Table 3.1
shows the priorities of these two types of exception handling.
Table 3.1
Priority
High
Low
3.2
3.2.1
A reset is the highest-priority exception. The internal state of the CPU and the registers of the on-
chip peripheral modules are initialized.
3.2.2
Reset by RES
the reset state.
To make sure the chip is reset properly, observe the following precautions.
Reset exception handling begins when the RES pin is held low for a given period, then returned to
the high level.
At power on: Hold the RES pin low until the clock pulse generator output stabilizes.
Resetting during operation: Hold the RES pin low for at least 10 system clock cycles.
RES
RES Pin: As soon as the RES pin goes low, all processing is stopped and the chip enters
RES
Overview
Reset
Reset Sequence
Overview
Exception Source
Reset
Interrupt
Exception Handling Types and Priorities
Section 3 Exception Handling
Time of Start of Exception Handling
Exception handling starts as soon as the reset state is cleared
When an interrupt is requested, exception handling starts after
execution of the present instruction or the exception handling
in progress is completed
Rev. 6.00 Sep 12, 2006 page 59 of 526
Section 3 Exception Handling
REJ09B0326-0600

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