MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 11

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
5.7.3
5.7.3.1
5.7.3.2
6.1
6.2
6.3
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.4
6.4.1
6.4.2
6.4.3
6.4.4
6.4.5
6.4.6
6.4.7
6.4.8
6.4.9
6.4.10
6.4.11
6.4.12
6.4.13
6.4.14
6.5
7.1
7.2
7.3
7.4
Freescale Semiconductor, Inc.
For More Information On This Product,
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
Peripheral Behavior in Low-Power Modes . . . . . . . . . . . . . . . 158
Summary of Peripheral State During Low-Power Modes . . . . 163
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Microarchitecture Summary . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Section 7. M•CORE M210 Central Processor
Concurrent Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Run Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157
Doze Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .157
Peripheral Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
OnCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Edge Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Random-Access Memory (RAM) . . . . . . . . . . . . . . . . . . . . 160
FLASH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
Queued Analog-to-Digital Converter (QADC) . . . . . . . . . . 161
Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .161
Programmable Interrupt Timers (PIT1 and PIT2). . . . . . . . 162
Serial Peripheral Interface (SPI). . . . . . . . . . . . . . . . . . . . . 162
Serial Communication Interfaces (SCI1 and SCI2) . . . . . . 162
Timers (TIM1 and TIM2). . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Reset Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Reset Status Flags. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
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Table of Contents
Section 6. Power Management
Unit (CPU)
Advance Information
Table of Contents
11