MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 522
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
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Part Number:
MMC2114CFCAG33
Manufacturer:
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Quantity:
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Queued Analog-to-Digital Converter (QADC)
19.11.7.1 Settling Time for the External Circuit
Advance Information
522
NOTE:
In
is the internal parasitic capacitor. C
sample and hold the input voltage. V
to provide charge to C
The following paragraphs provide a simplified description of the
interaction between the QADC and the user’s external circuitry. This
circuitry is assumed to be a simple RC low-pass filter passing a signal
from a source to the QADC input pin. These simplifying assumptions are
made:
The values for R
determine the length of time required to charge C
level (V
open, disconnecting the internal circuitry from the external circuitry.
Assume that the initial voltage across C
across it is determined by the equation, where t is the total charge time:
As t approaches infinity, V
leakage.) With 10-bit resolution, 1/2 of a count is equal to 1/2048
full-scale value. Assuming worst case (V
shows the required time for C
actual source voltage during 10-bit conversions.
on the RC network in
The following times are completely independent of the A/D converter
architecture (assuming the QADC is not affecting the charging).
Figure
•
•
•
•
Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
The external capacitor is perfect (no leakage, no significant
dielectric absorption characteristics, etc.).
All parasitic capacitance associated with the input pin is included
in the value of the external capacitor.
Inductance is ignored.
The "on" resistance of the internal switches is 0 ohms and the "off"
resistance is infinite.
SRC
19-53, R
). At time t = 0, V
V
Go to: www.freescale.com
CF
= V
SRC
F
, R
SRC
, R
Figure
SRC
samp
F
(1 –e
, and C
CF
, and C
during sample phase.
SRC
will equal V
–t/(R
19-53.
F
to charge to within 1/2 of a count of the
F
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
changes in
F
F
in the user's external circuitry
comprise the external filter circuit. C
+ R
Samp
I
is an internal voltage source used
SRC
F
is 0. As C
SRC
is the capacitor array used to
SRC
) C
F
. (This assumes no internal
Figure 19-53
)
= full scale),
F
Table 19-14
F
to the source voltage
charges, the voltage
Table 19-14
while S1 is
MOTOROLA
is based
P
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